1. Field
Example embodiments of the present invention relate to an alloy solder and a semiconductor device using the alloy solder. Other example embodiments relate to an alloy solder capable of increasing reliability of a junction between a semiconductor chip and a substrate.
2. Description of the Related Art
In response to a recent trend towards miniaturization of electronic devices, various studies are being conducted in the semiconductor industry to mount more semiconductor chips on a smaller substrate by fabricating smaller and highly integrated semiconductor packages. Flip chip mounting technology has been used for mounting such semiconductor devices. Flip chip mounting technology is a technology in which a semiconductor chip may be directly mounted on a substrate by using conductive solder bumps. Flip chip mounting technology may have improved electrical properties due to a reduced connection distance between the substrate and semiconductor chip, compared with a conventional semiconductor chip mounting method (e.g., a wire bonding method and/or a tape automated bonding (TAB) technology using a tape wiring substrate).
According to the flip chip mounting technology disclosed in the conventional art, before a solder bump is formed on a semiconductor chip, an under bump metal (UBM) layer may be formed by plating a wafer unit on a bonding pad of the semiconductor chip, which may be costly. A semiconductor chip may also be mounted on a substrate by forming a gold (Au) stud bump and without forming the UBM layer on the bonding pad. In flip chip mounting technology using a gold (Au) stud bump, the gold (Au) stud bump may be formed on a bonding pad of a semiconductor chip. The gold (Au) stud bump of the semiconductor chip may be attached to a substrate using an alloy solder. Connection resistance may be reduced, because the signal transfer path may be shorter. Production cost may also be reduced, because the gold (Au) stud bump may be formed using a wire bonding method that is used as a chip connection method for semiconductor devices. Alloy solders have traditionally been tin-lead (Sn—Pb) solders. Lead (Pb)-free solders (e.g., solders containing tin, Sn-3.5Ag, Sn-2.5Ag-1Cu and/or the like) have been used recently due to environmental reasons.
Alloy solders may electrically connect a semiconductor chip and substrate through a reflow process. If a paste type alloy solder is interposed between a gold (Au) stud bump in the semiconductor chip and a substrate pad on the substrate, and the temperature is above the melting point of the alloy solder, the alloy solder may melt and react with the gold (Au) stud bump and substrate pad (e.g., copper (Cu), gold/nickel (Au/Ni), and/or any other suitable element or compound). The semiconductor chip may then attach to the substrate. FIG. 1 illustrates a junction formed after completing a conventional attachment process.
FIG. 1 is a photo of a junction observed by an optical microscope, in which a gold (Au) stud bump may be flip chip bonded to a substrate formed with a conventional tin-silver-copper (Sn—Ag—Cu) alloy solder. The photo is taken by a scanning electron microscope (SEM) to identify a microstructure of the junction.
Referring to FIG. 1, a junction 30 may be formed using a gold (Au) stud bump 32 and a tin-silver-copper (Sn—Ag—Cu) alloy solder. An intermetallic compound layer of AuSn/AuSn2 34 may be thinly formed on a surface in contact with the gold (Au) stud bump 32. An intermetallic compound layer of AuSn4 36, constituting most of the junction 30, may be formed under the intermetallic compound layer of AuSn/AuSn2 34, and a small amount of tin (Sn) 37 may remain inside the intermetallic compound layer of AuSn4 36. A thin intermetallic compound layer of nickel-tin (Ni—Sn) 38 may be formed through a reaction with nickel (Ni) on the surface of a substrate pad 22. The structure of the junction 30 illustrates a similar result with a two element alloy solder (e.g., a tin-silver (Sn—Ag) solder and/or any other suitable solder), with a pure-Sn solder and/or any other suitable solder, and with a three (3) element alloy solder of tin-silver-copper (Sn—Ag—Cu). The intermetallic compound layer of AuSn4 36 may be formed in a relatively large amount after a reflow process, because the diffusion rate of gold (Au) into a solder (e.g., a pure-Sn, tin-silver (Sn—Ag), tin-silver-copper (Sn—Ag—Cu) solder and/or any other suitable solder) may be relatively fast in a liquid state.
If a relatively large amount of the intermetallic compound layer AuSn4 is formed in the junction, the junction may be deformed easily by external forces, because the junction is brittle mechanically. If a temperature change test is conducted, cracks may easily occur at the junction to which stresses are applied due to the difference between the thermal expansion ratios of the semiconductor chip and substrate. The reliability of the junction may thereby decrease.